IBM Corp and Motorola Inc have introduced a 250MHz version of the PowerPC 604e RISC built in their new 0.25 micron design process, which was formerly code-named Mach 5. By speeding the clock rate to over 300MHz by year-end, the Somerset PowerPC design partners claim they’re ahead of the schedule laid down in a PowerPC roadmap which described plan for the instruction set up to and beyond the year 2000 (CI No 2,970). Mach 5, formally known as PPC4 – which IBM has dubbed CMOS 6X (for X-ray) – is a hybrid version of the previous 0.25 micron PPC design process used, for example, for the 300MHz PowerPC 603e. Produced in a six-layer metal process, the 250MHz 604e is much cooler than previous designs, dissapating 5 Watts compared with the 14.5 Watts generated out by the 200MHz 604e PPC3 design. It also draws less juice – 1.8 volts – has a 67% smaller die size at 47mm square, and 5.1m transitors. The first implementation of Somerset’s G3 PowerPC microarchitecture design point – 604 and 603 are G2 architecture – will be announced later in the summer using the Mach 5 process. Currently know by its code-name, Arthur, the enhanced PowerPC 603 design includes a new on-chip Level 2 cache controller plus TAG RAM support. It’s also claimed to be the first design that’s been optimised using real-world PowerPC applications; previous chips have been tuned with specially- written programs. G3 designs include what’s described as an on- board thermometer which helps schedule activity – there will supposedly be a couple of new surprises too. Arthur’s 603 foundations means it will be targeted at high-performance uniprocessor as well as laptop and other mobile system implementations. It’ll support system designs with up to two processors. G3 processors targeted for multi-processing systems will appear in 1998, following the introduction of the 64-bit G2 generation PowerPC 620 in the fall. Motorola supplies PowerPC chips to Macintosh compatible builders as well as its systems partner Compagnie des Machines Bull SA. Motorola’s 250MHz 604e sells for $400 for 1,000-up. IBM’s implementation sells for $720 for 1,000-up.
