Hewlett-Packard Co is preparing a new range of high-end V Series symmetrical multiprocessing systems using its PA-8200 RISC chip, according to our sister newsletter Unigram.X. The servers are due in April, at the same time as the expected T600 data center servers using the PA-8000 (CI No 3,105). It’s unclear yet as to whether the V Series systems, described as mainframe alternatives suitable for high end online transaction processing and very large database applications, will come out through Hewlett- Packard’s commercial server group or through its Convex Computer Corp subsidiary. The V series is being positioned as the vehicle for getting to Merced, Intel Corp’s next-generation 64-bit processor. Convex’s current Exemplar X and S series units aren’t expected to be upgradable to Merced. The V Series will run the 64-bit 11.0 version of HP-UX, the company’s first foray into 64- bit Unix, and it will be able to run today’s 32-bit applications as well. The boxes are expected to perform five times faster than the commercial T Series, although not in their first iterations. Last June Hewlett-Packard was saying it would be about a year before the Convex technology would find its way into commercial systems (CI No 2,943). The 220MHz PA-8200 is the second member of the 64-bit Precision Architecture RISC 2.0 family, which can be supplemented with 2Mb SRAM off-chip cache. The chip has a benchmarked performance rating of 15.5 SPECint95 and 25 SPECfp95.
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