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  1. Technology
August 19, 1998


By CBR Staff Writer

To gain maximum advantage from the forthcoming Intel Corp IA-64 processor family’s EPIC explicitly parallel instruction computing architecture, Hewlett-Packard Co needs programmers to start injecting parallelism into their code and to encourage the creation of a range of compiler technologies which can marshall this code into ‘wide-word’ instructions for execution. That’s why HP has teamed with the University of Illinois’ Impact compiler group and New York University’s React-ILP Labs on the creation of a Trimaran EPIC compiler research infrastructure to the academic community. HP has been developing EPIC compilers since 1989 in its compiler and architecture research (CAR) group’s PA-WideWord program, utilizing some of the skill set HP acquired from Multiflow Computers Inc, Cydrome Inc and their pioneering VLIW very long instruction word architecture work which informed the HP/Intel EPIC/IA-64 design. In a remarkably frank admission, HP says that while the infrastructure does not give any indication about the possible performance advantages of running applications on IA-64, the work does reveal enough about IA-64 that would enable someone could go off and build an IA-64 part if they had the resources and wherewithal. It said it had long discussions with its lawyers about IP issues before it decided on its course of action but figured it’s now so far ahead with IA-64 development that no one’s likely to bother giving chase. The Trimaran infrastructure is said to enable engineers to take advantage of parallelism and can be used to demonstrate how to transform existing code. HP has put its Elcor compiler research environment together with the universities’ parallel and Impact compiler technologies to come up with Trimaran, named for the tri-partite initiative. HP says Trimaran is parametric and does not describe one particular architecture. Instead its parameters can be manipulated to examine different forms of parallelism. It’s front-end by C++. HP’s CAR group is now investigating how EPIC, compiler and array technologies can be used to automatically create custom, application-specific, embedded processors.


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