Hitachi Data Systems is not using Hewlett-Packard Co’s Precision Architecture RISC as the basis of a new mainframe, but as a high performance server, a black box co-processor for its IBM-compatible M-series mainframes, with a data transfer rate of 60 times 150Kbytes-per-second minimum. The RISC architecture will enable mainframes to deal with information packets at a very high rate, breaking that traditional 150Kbps barrier, and the aim is to develop the processor to the point where it can be integrated on a chip, just like a Vector Facility. The company is about to put the co-processor into beta test and expects it to be available in the second half of 1992. However, it is only one strand of development and a high-performance transaction processor, database engine and compute server are all in the pipeline. Apart from Hewlett-Packard, Hitachi has been collaborating with a number of companies, including Teradata Corp, although it stresses that there is no indication of a new product from that relationship. Hitachi has a database engine with multiple co-processors under VOS, but moving that into the MVS arena requires IBM’s co-operation and willingness to offer compatibility. Compatibility is something to which Hitachi remains committed, but the company is casting its net beyond MVS, and the combination of RISC technology and the Open Software Foundation looks to be strategic to future development. Apart from an Open Systems Software Development Centre in Boston, Hitachi Ltd intends to support OSF/1 and the Distributed Computing Environment on the M-Series processors by the fourth quarter and native AIX will be qualified on Hitachi Data kit when it is released by IBM, although the company does have reservations about the current capabilities of AIX on 370 CPUs. The company says that the aim is to achieve a marriage between System 390 and Unix and that that will involve issues like shared environments, shared data and networking.
