Hewlett-Packard Co revealed a few more details on its next generation Precision Architecture microprocessor (CI No 1,322) saying that the design technology enables it to put its entire RISC on a single chip, thereby at least doubling the performance of its minicomputers and workstations: the chip is about 2 square and integrates nearly 1m transistors; it has 400 pins and will be fabricated in 0.8 micron CMOS; it will draw less than 10W of power and will offer clock speeds greater than 48MHz; Hewlett claims that integer performance will reach 50 to 60 MIPS and floating-point performance 12 MFLOPS to 16 MFLOPS; the chip will go into machines that will be priced at between $12,000 to $1m for high-end multiprocessors and a key feature is the capability to build in different cache designs depending on whether the chip is destined for workstations that will be required to do intensive floating-point operations or for integer-intensive business applications.
