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April 3, 2013

GlobalFoundries showcases 3D stacking technology

Used to manufacture 20nm silicon wafers

By CBR Staff Writer

GlobalFoundries has showcased a new technology that allows 3D stacking of chips for use in mobile and consumer applications.

The company uses the 20nm-LPM process technology to manufacture its first functional 20nm silicon wafers with integrated Through-Silicon Vias (TSVs).

According to the company, TSV capabilities will enable users to pile multiple chips on top of each other to boost performance, power, and bandwidth of the electronic devices.

The semiconductor manufacturer uses via-middle approach to combine the TSVs that includes inserting the TSVs into the silicon after the wafers have completed the Front End of the Line (FEOL) flow and before starting the Back End of the Line (BEOL) process.

Engineers from GlobalFoundries have designed a contact protection method to overcome the challenges that come along the migration of TSV technology from 28nm to 20nm, which enables combination of TSVs with minimal disruption to the 20nm-LPM platform technology.

GlobalFoundries packaging R&D vice president David McCann said, "Our next step is to leverage Fab 8’s advanced TSV capabilities in conjunction with our OSAT partners to assemble and qualify 3D test vehicles for our open supply chain model, providing customers with the flexibility to choose their preferred back-end supply chain."

The company claims that the approach avoids the high temperatures of the FEOL manufacturing process and enables it to use copper as the TSV fill material.

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