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July 26, 1990

FUJITSU UNVEILS ITS 17 MIPS TRON MICROPROCESSOR

By CBR Staff Writer

Fujitsu Ltd has introduced in Japan its high-speed 32-bit chip in the G-Micro family of parts with an architecture optimised for the Tron operating system. The G-Micro F32/300 – MB92301, is accompanied by the MB92461 clock pulse generator, and has an on-chip real-time operating, RealOS/F32, which is based on the I-Tron industrial variant of the operating system. Fujitsu suggests that the part be used as a target embedded processor with applications development for it being done either under Unix System V.3.1 or B-Tron. Fujitsu rates the part at 17 MIPs in the 25MHz version, 14 MIPS at 20MHz; it has 113 instruction, a 2Kb on-board instruction cache, a 2Kb operand cache, a six-level inst ruction queue. The part is implem ented in 1 micron CMOS, and tools available for the G-micro F32/300 are C compilers, assembler, simulat and debugger for Fujitsu’s FMR per sonal computer family under OS/2; for SunOS 3.5 and 4.0 on the Sun-3; and VMS 4.5 on the DEC VAX. No pri ces or delivery dates were given.

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