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September 20, 1998


By CBR Staff Writer

After the push by Mitsubishi Electric Corp and Sharp Corp to form a stacked chip standard (CI No 3,496) , Fujitsu Ltd, NEC Corp and Toshiba Corp are putting forward their own stacked multi-chip package specification, which Fujitsu says saves space by combining static random access memory and NOR flash memory on a single chip. Fujitsu and Toshiba kicked off work on the specification last year with introduced a Ball Grid Array MCP in April, 1997, which mounts flash memory and SRAM side-by- side. The new Stacked MCP mounts flash memory and SRAM allows for a further reduction in space through vertical stacking. The three companies will mount 16Mb or 32Mb flash memories and 2Mb or 4Mb SRAM and ship first samples before the end of the year, with mass production set to kick off in spring next year. Although each company will manufacture and market the chip, which will be used in ever-shrinking mobile and hand-held devices separately, they will to act as secondary sources for one another. The specification was backed by Seiko Epson Corporation, Hyundai Electronics Industries Co Ltd. and Samsung Electronics Co Ltd.

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