Although Intel Corp IA-64 chips will be capable of executing many instructions in parallel, in fact more, claims IA-64 co-developer Hewlett-Packard Co, than is possible on super scalar RISCs, the problem is that 99.99% of the code in the world is not written for parallel execution. Even though it might run faster on IA-64, it can’t take advantage of IA-64’s full functionality unless the code is recompiled with a compiler that injects unplanned parallelism into the serial code. In addition to the compilers and supporting electronics the two have been working on since they began their project, Intel has also lined up a clutch of compiler vendors to target IA-64’s parallelism, including Edinburgh Portable Compilers Ltd. In addition to moving its currently Unix-only Fortran and C/C++ compilers for Intel IA-32 to Windows NT early next year, EPC says it’ll optimize new versions of them for NT and Unix running on IA-64. It’s going to embed Kuck & Associates Inc’s (KAI) parallel Fortran90 technology in its EPC Fortran90 compiler and use Kuck’s C++ tools to optimize its C/C++ compilers for objects. KAI says its OpenMP work is targeted at symmetric multiprocessing systems, precisely where IA-64/Merced is targeted. The EPC compilers will work in conjunction with Intel’s IA-64 code generators which it’s supplied to compiler partners for development purposes. EPC says it has one significant system vendor already using its IA-64 work under NDA. It will announce details of its NT and IA-64 plans next month but is only going to sell the IA-64 work to companies that Intel OKs. EPC also sells compilers for use with Sparc and PowerPC. Its next 64-bit work will be the Mips RISC, it says.
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