Digital Equipment Corp’s 10-year-old Palo Alto, California-based Western Research Lab is trying to design a single BiCMOS chip that will run at 1GHz, according to Microprocessor Report. The project, dubbed BIPS-1, will implement the Alpha RISC architecture and is expected to produce testable silicon before the end of next year. The part is to integrate an integer unit, floating point unit and two levels of cache – the first, 8Kb, the second 32Kb – on a hefty 6m transistor die, the first reported attempt at putting two cache levels on a single chip. The part is specified to dissipate a daunting 175W at 4.5V so Western Research Labs engineers are rigging a little water cooling system sealed inside a low-pressure cylinder – sounds something like IBM Corp’s thremal conduction module. Microprocessor Report notes that the coffee-warming 30W of the current 21064 Alpha chip pales in comparison to the bacon-sizzling BIPS-1. DEC has never so far actually used a Western Research Labs-designed computer architecture, although the unit was originally established to find ways of building the fastest possible computers for DEC.
