The all-flash storage market is set to hit $1.2bn in revenue by next year, according to IDC, with a compound annual growth rate of 58.5%.
So what is it? And what’s all the fuss about?
Pure Storage’s director of marketing, Luanne Dauber, explains.
"Without wanting to give you a long and boring history lesson, let’s quickly take things back to the beginning. Flash memory was named just that because its read/write speeds reminded its inventors of the flash from a camera. Known as a solid state storage device, it has no moving parts, which allows it to be quicker, quieter, and more resistant to physical shock.
"On the more technical side, it’s actually a type of non-volatile memory based on the logical circuit called a NAND gate. Non-volatile means that the memory cell retains its data even when the circuit receives no power.
"Flash memory comes packaged either as solic state drives (SSDs), packaged stand-alone ICs, or even as bare dies."
Data Retention
A lot of people don’t know it, but flash cells lose their charge over time. They can also get worn out as you erase and re-write to them. For enterprise storage, suppliers should be able to explain what they do to refresh data over time to account for the loss of charge to the flash cells. Whether using SSDs or packaged chips, some explanation of error detection – and correction (called ECC) should be in the conversation.
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Endurance or programme/erase (P/E) Cycles
Endurance is the shelf life of a flash cell. As stated, flash cells get worn out as you erase and re-write to them, eventually resulting in device failure. The more you write to a cell, the weaker it becomes. There are optimisation techniques to regulate the rate at which your flash wears out. Wear levelling, the process of distributing writes over the flash blocks, is one of these.
Single, Multi, and 3-bit Level Flash Cells
Every flash cell has a ‘level’, or the logical method of defining the value of that stored bit. This then defines how many bits you can store in a flash cell and it helps determine the cost per gigabyte at the device level. As the industry tries to store more bits in a single cell it is being presented with unique challenges. It has to find ways to control the increased error rates that come with these more complex, and more efficient, semiconductor architectures. This creates different devices that process the different cells
Single Level Cell (SLC) devices: can support P/E cycles in the tens of thousands, while MLC devices (two bits per cell), typically used for consumer applications, will range in the low to mid thousands of cycles and fail sooner. SLC is considerably more expensive than MLC, although the underlying circuit is identical. In a storage system, you should know which type of flash cell is being used.
Write Amplification
Flash cells have to be erased before they can be written to. Erasing takes a long time compared to a read or a write. When you erase, you do it in larger chunks than when you write. The result of this – and the fancy term is the asymmetric read/write situation – is write amplification. This means to write a page of data, first you have to erase the whole block. Valid pages are moved to another location, meaning the same data is written over and over again to different locations in the flash device, wearing out the flash cells faster.
Performance
One of the complexities of using flash is that reading and writing are asymmetric in size and duration. Erase, write and read operations all happen in different ways, concurrently, using shared routing resources. When you combine the asymmetric reads and writes, you can experience a significant variance in performance. The big challenge for a storage system is to understand how your reads can be executed from a location that is pre-occupied with erasing and/or writing.
One thing that is, hopefully, apparent from this is that managing the process of reading and writing is absolutely imperative. Good software can, and does do this, and once it does, the full benefits of flash can be realised.
