Cyrix Corp yesterday unveiled its new M1 superscalar, superpipelined architecture for iAPX-86-compatible processors: the company claims parts using it will be able to be clocked at 100MHz and up and to deliver one SPECint per MHz. The company is also borrowing from RISC by expanding the limited iAPX-86 register set to 32 physical registers, and implementation of register renaming. Unlike Intel Corp’s Pentium, chips – planned for next year – using the new architecture will not require that the software be recompiled to get the full benefit of the extra performance.
