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November 17, 1993


By CBR Staff Writer

Convex Computer Corp’s Precision Architecture RISC-based scalable parallel machine now has a name – Exemplar – and the company, and its Japanese partner, steelmaker NKK Corp have given a few more details on it. It will have up to 128 of the RISC processors and target peak performance is 25 GFLOPS and is due for launch in the first quarter next year. Convex has also been describing the Exemplar software environment, which it says features three components. The first component is a scalable operating system consisting of a distributed microkernel, binary compatibility with Hewlett-Packard Co’s HP-UX Unix, and source code compatibility with existing Convex applications. The microkernel is an enhanced version of the Mach microkernel from the Open Software Foundation Research Institute and is designed to run highly parallel applications on a large number of processors. The layer providing binary compatibility with HP-UX enables many of the existing HP-UX applications to run on the Exemplar, including Hewlett’s middleware suite of standards-based libraries, commands and utilities that provide the programmer with HP-UX user interfaces and application compatibility. The second component is a multiple-instruction, multiple-data-based programming model using Global Shared Distributed Virtual Memory to provide a familiar single-system image of memory and enable the programmer use current high-level languages. The Exemplar’s compilers will automatically parallelise standard Fortran 77, Fortran 90 extensions, C, C++, and mixed language source code and, combined with an interprocedural optimiser, will produce some of the most efficient parallel code possible on existing programs, the company claims. Existing Hewlett-Packard single-threaded binary modules can be intermixed with Exemplar multi-threaded modules in one application. The third component is a set of development and conversion tools – graphical debugger, performance analyser and trace analyser, Convex Computer announced.

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