Back in 1994, Colindale, UK games and graphics accelerator chip developer Argonaut Software Ltd – best known for its BRender three-dimensional rendering technology – had no plans to offer its 32-bit Argonaut RISC Core on the open market, despite claiming that it had a slight edge on the ARM from Advanced RISC Machines Ltd. Instead, it said, it planned to keep the thing all for itself, and to embed it in its own future products (CI No 2,480). But times change, and now the company is not only offering the RISC to others, but it has formed a sister company, Argonaut RISC Cores Ltd, to exploit it, and has now established Argonaut RISC Cores Inc in Huntsville, Alabama as a subsidiary of what is now Argonaut Ltd. And the part, described as an extendable RISC core with signal processing extensions, and rated at 40 to 50 MIPS, which in a good 0.35 micron process is claimed to achieve clock speeds of 110MHz, is generating some excitement among those that support the embedded community. OPTi Inc, Milpitas, California has just announced a worldwide non-exclusive license agreement with Argonaut for the ARC microprocessor and reckons it has a big future in graphics, telecommunications, networking peripherals and multimedia applications. A key feature of the part is that designers can custom tailor the instruction set for almost any embedded application. OPTi says the agreement gives it the ability to support development of future audio, telephony, three-dimensional and intelligent controller products. The designer of support chip sets joins the Brooktree arm of Rockwell International Inc, Fujitsu Ltd, S-MOS Systems Inc and ULSI Systems Inc, but OPTi now wants to diversify into advanced audio and telephony products, and says this requires RISC and signal processing technologies that it can not only license but also adapt to its specific design needs. As well as their own instructions, Designers can also add registers and condition codes to build their perfect microprocessor. The Argonaut Application Specific RISC Pro- cessor ARChitecture design set includes synthesizable VHDL source code and a rapid hardware prototyping system. The hardware development system is based on Altera Corp’s FLEX 10K100 programmable logic device, which enables a hardware engineer to modify the ARC instructions, synthesize the design, and reprogram the Altera part in no more than three to five hours. It includes 512Kb static RAM, liquid crystal display, and personal computer interface. The company has also just signed MetaWare Inc, Santa Cruz, California to add its software High C development tool chain. The High C development environment for ARC will be hosted on Windows and Unix systems and will include MetaWare’s super-optimizing compiler, linker, user-extensible assembler and debugger. It is due to be shipped next quarter.
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