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February 16, 1989


By CBR Staff Writer

Sir Clive Sinclair’s waferscale memory chip venture came close to lift-off last August when Fujitsu Ltd agreed to invest UKP2m of its UKP6.5m second round financing for Anamartic Ltd, Milton, Cambridge (CI No 1,004). Today, the infant company gets another lift on the road to recognition when it and Fujitsu stand up and respond to an invitation from the chip industry holy of holies, the International Solid State Circuits Conference in New York to describe the waferscale memory chip they have designed. A rule of the invitation is that companies may ahead of time reveal only a brief outline of part before they present it, so all the two partners are able to say is that they will be describing a wafer capable of storing up to 200Mbytes of data, made up of an array of 1M-bit memory chips with ancillary circuitry that can detect and disconnect all faulty memory chips on the wafer. The concept should lead to slower but dramatically cheaper semiconductor memory that in the medium term could threaten rotating storage. By leaving out the scribing, breaking up and encapsulation and wiring processes on the individual chips – each putting the part in mortal danger – and simply wiring and encapsulating the entire wafer, yields rise and costs fall dramatically.

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