View all newsletters
Receive our newsletter - data, insights and analysis delivered to you
  1. Technology
October 14, 1998

ANALOG, MOTOROLA DISCLOSE NEW DSP ARCHITECTURES

By CBR Staff Writer

Analog Devices Inc and Motorola Inc both introduced new digital signal processing architectures at the Microprocessor Forum yesterday, part of an explosion of new innovation in the DSP world. Fashionable media-rich applications have re-invigorated the DSP market, which currently generates some $4bn revenues annually, and there has been a continued blurring of DSPs with more general purpose CPUs and media processors. Analog introduced the third generation of its Sharc DSP architecture, TigerSharc, while Motorola Inc disclosed the first joint architecture derived from its Star*Core joint design venture with Lucent Technologies Inc, announced earlier this year. Both new architectures come as licensable cores so that OEMs can add their own peripheral chips. ADI claims its new DSP, aimed at telecommunications infrastructure applications, employs a static superscalar architecture that gives it performance levels starting at 2bn multiple/accumulates per second – four times faster than competitive products, it claims. The chip is basically a RISC processor that borrows instruction set scheduling from VLIW very long instruction word techniques. A single chip based on the TigerSharc core can support 8- 16- and 32-bit data processing, all needed to support next-generation telecommunications protocols such as IMT-2000 and xDSL digital subscriber line. It supports both high-level language compilation and interruptible assembly programming needed for real-time operation. ADI promises the first chip and development tools in the first part of 1999. Motorola’s Star*Core 400 is also aimed at third generation wireless systems and borrows Intel Corp’s EPIC label to describe its explicitly parallel instruction computing VLIW techniques. Motorola says that a wide range of possible implementations are possible, and described one of its own the Star*Core 440, a 300MHz static design in 0.18 micron process with 0.13 micron gate lengths. It’s likely to run at 1.2bn multiple/accumulates per second. Software tools (C/C and assembly) are due in the first half of next year, with core silicon in the second half of next year. Motorola and Lucent said they would be converging their DSP design teams under the Star*Core name in Atlanta, Georgia, this November. The two new products are likely to compete with Texas Instruments Inc’s VLIW-based TMS6000 digital signal processors, already out on the market.

Websites in our network
NEWSLETTER Sign up Tick the boxes of the newsletters you would like to receive. Tech Monitor's research, insight and analysis examines the frontiers of digital transformation to help tech leaders navigate the future. Our Changelog newsletter delivers our best work to your inbox every week.
I consent to New Statesman Media Group collecting my details provided via this form in accordance with the Privacy Policy
SUBSCRIBED
THANK YOU