Intel has unveiled its new technical strategy – along with a range of next generation technologies – at an “architecture day” that detailed a fundamental shakeup of its innovation strategy, and a focus on six specific engineering segments.
Among the standouts: demonstration of a new 3D logic chip stacking technology dubbed “Foveros” which Intel will bring to CPU, graphics, and AI processors at scale, and the release of its “One API” project to simplify the programming of its hardware.
The showcasing of its road map followed a record quarter in which Intel revenue hit $19.2 billion, with net income of $6.4 billion. Despite the results, analysts had warned that the company faces growing competition from rivals.
An employee at Intel’s Oregon fabrication facilities. Credit: Intel
10 Petaflops, 10 Petabyes, 10 Seconds
Describing a fundamental shakeup of Intel’s innovation model, the company’s Chief Architect Raja Koduri said in a Q&A: “We see immense demand for computing architectures that evolve rapidly and scale exponentially. We have a bold engineering vision over the next five years to deliver 10 petaflops of compute and 10 petabytes of data within 10 milliseconds to every person in the world.”
Intel Strategy: 6 Pillars
Intel’s six areas of focus will be as follows: 1) advanced manufacturing processes and packaging; 2) new architectures to speed-up specialised tasks like AI and graphics; 3) super-fast memory; 4) interconnects; 5) embedded security features; and 6) common software to unify and simplify programming for developers.
The latter promise comes as the company continues to grapple with the challenge of supporting clients programming its powerful FGPAs (field programmable gate arrays); a semiconductor integrated circuit where electrical functionality is customised to accelerate key workloads.
Architecture Day Highlights
Foveros
This new technology allows designers seek to “mix and match” technology IP blocks with into smaller “chiplets” where I/O, SRAM and power delivery circuits can be fabricated in a base die, and high-performance logic chiplets be stacked on top. Foveros-based products are coming in H2, 2019.
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Sunny Cove
This is Intel’s next-generation CPU microarchitecture. It has been designed to increase performance and power efficiency for general purpose computing tasks. Sunny Cove features include new algorithms to reduce latency and architectural extensions for specific use cases and algorithms, including AI and cryptography.
Graphics
Intel’s Gen11 graphics architecture is expected to double the computing performance-per-clock compared to Intel Gen9 graphics. It is expected to also feature an advanced media encoder and decoder, supporting 4K video streams and 8K content creation. Intel also reaffirmed its plan to introduce a discrete graphics processor by 2020.
“One API” Software
The “One API” project is designed to simplify the programming of diverse computing engines across CPU, GPU, FPGA, AI and other accelerators. It includes a portfolio of developer tools for mapping software to the hardware. A public project release is expected to be available in 2019.
Memory and Storage
The company highlighted updates to its Intel® Optane™ DC persistent memory: a new product that converges memory-like performance with the data persistence and large capacity of storage. Intel said the technology “brings more data closer to the CPU for faster processing of bigger data sets like those used in AI and large databases.”
Deep Learning Reference Stack
Intel is also releasing its Deep Learning Reference Stack, an open source stack built for cloud native environments that it hopes will support open source AI efforts. Intel desribed the stack as “enabling developers to quickly prototype by reducing the complexity associated with integrating multiple software components”
Intel Strategy: Summing Up
The day, in a nutshell?
In Raja Koturi’s words: “The workloads associated with this computing landscape are changing. No longer do consumers or enterprise customers have simple applications that can be addressed with straightforward scalar architectures alone.”
“Instead we see programs that are solving problems faster by integrating additional architectures from graphics processors to artificial intelligence accelerators to image processors and even adaptable designs like FPGAs powered by new memory technologies.”
He concluded: “We will combine computing and architecture innovations through high-speed interconnects with new models for software development that simplify APIs for developers and allow more performance and efficiency to be unlocked from Intel computing architectures.”
