By Dan Jones
As Sun Microsystems Inc spools out more details about its Microprocessor Architecture for Java Computing (MAJC) concept, questions remain about the efficiency and price of the multi- processor design. Sun is claiming that MAJC will be engine for a new generation of multimedia products, that process anything from audio and video streaming to ‘wire speed’ voice data.
When MAJC was announced at the beginning of August, Sun’s chief scientist Bill Joy told ComputerWire that the architecture was in a different performance class from rival chips such as National Semiconductor Inc’s recently announced Geode line. My impression is that whenever Sun has a new technology, they always tout it as replacing all other similar technologies…that’s overblown, comments Dataquest embedded processor analyst, Joseph Byrne, while noting that it is difficult to judge a technology about which so little is known.
The Sun architecture will exploit the multi-threaded nature of the Java language, being able to execute four instructions in parallel. The design allows for the combination of between 2 and 1,024 processors on a single die, with each of those processors being able to access the same level one cache memory.
However, without the support of other chip designers what Sun is essentially designing is a multimedia processor, albeit an extremely sophisticated one. Sun has been at pains not to call the chip a multimedia processor because of the failure of such designs from companies like Chromatic. However – from what we know about MAJC – it has some key similarities. The chip uses a very long instruction word (VLIW) set and Sun is targeting the chip at the advanced set-top box market – devices that require powerful multimedia capabilities. Sun is expecting that other companies will develop ‘IP blocks’ – modems, memory controllers and the like – to integrate with MAJC in system on a chip designs.
One of the reasons that multimedia processors are said to have failed in the past is because of the difficulty of using VLIW sets. Yet Sun is once again trying to regulate the interesting stuff to the compiler, claims Byrne. The analyst described the Sun architecture as similar to a superscalar design, except that the MAJC compiler would be handling the chip’s instruction scheduling rather than it being done in hardware. Sun insists that the team that is developing the MAJC compiler have been working hand-in-glove with the silicon designers.
Byrne thinks that Sun has learnt lessons on designing chips for smaller devices – Sun’s previous embedded efforts have been seen as expensive and power-hungry. Byrne thinks that the new chip will be priced in the tens of dollars and be an energy efficient design. However, the question might still be asked – will manufacturers of set-top boxes and internet appliances, be prepared to pay the capabilities that Sun is promising?
