Electronic Design Automation (EDA) specialist Sente Inc of Acton, Massachusetts said this week it has signed a $1m deal with Munich-based Siemens Semiconductors under which Siemens will use Sente’s technology to address the power consumption problems of complex system-on-chip designs. Under the multi-year partnership, Siemens will use Sente’s power analysis software with its ASIC design tools and methodology to manage the degree of power consumption during the chip design process. Siemens all-in-one- chips are incorporated into numerous devices, including mobile phones, networking hardware and disc drive electronics.
Power consumption is one of the big issues for manufacturers of system-on-a-chip ASICs, said Eric Filseth, VP of marketing at Sente. The more functions you put on a chip, the more power it dissipates and the chip starts to get very hot, he said. Our software helps developers to test the chips earlier during the design process so that the final product has a more efficient power consumption. Filseth added that Sente also has similar partnerships with many other chip makers including Hewlett Packard, Sony, LSI Logic and Fujitsu. Specifically, Siemens said it will integrate Sente’s Watt Watcher and Peak Watcher into its Semi-Custom Highway ASIC design tools and development platform to enable designers to run a complete power analysis of their design during the development procedure.
Low power design is a first priority for us, said Alex Haggenmiller, project leader of Siemens’ Semi-Custom Highway. With the available number of gates [functions] on a die increasing faster than the power per gate falls, all complex ASIC designers are faced with the challenge of designing with regard to power. Investigations, as early as possible in the chip development, is one major step to meet this challenge. Watt Watcher is available within the Semi-Custom Highway immediately, with Peak Watcher to be available shortly, the companies said.
