The University of California at San Diego UCSD is still waiting for its $4.2m MTA Multi Threaded Architecture supercomputer from Tera Computer Co (CI No 3,040), the company that has been trying to get the MTA out of the door since 1987 (CI Nos 2,889; 3,028). The machine was supposed to be installed at the UCSD’s San Diego Supercomputer Centre early 1997 – but Tera now says it will only go to the organization in, the next couple of months. Tera says the delay is simply down to the complexity of fabricating the components. The company says it has done two of three stages of booting the operating system on a prototype single processor machine – UCSD’s is to be a quad processor – and that the first two stages combined took only a month, with hardware fixes happening along the way. The MTA Multi-Threading Architecture will use from six to 256 CPUs of Tera’s own design, each of which will be able to process up to 128 threads, or pieces of an application at a time using automatic paralleling compilers. The chips perform three instructions per clock cycle. Because memory is shared, Tera says its cacheless design will eliminate memory latency and locality issues. It claims MTA, which runs a version of BSD 4.4 Unix, will run Cray Research Inc’s vector application supercomputer code with normal porting. Tera Computer was founded in 1987; it signed an $8m multi-year contract with Cadence Design Systems Inc, San Jose, California for design and engineering assistance in April this year (CI No 3,140). Cadence is helping the company fabricate its chips from silicon rather than Gallium Arsenide – making them cheaper to produce. Tera reported a first-quarter net loss of $2.4m, on zero revenue, down from a loss of $3.6m a year ago.
