John Mashey, MIPS Technologies Inc’s ebullient director of systems development was in London recently to describe some of the company’s latest microprocessor technologies, and to shed some light on current semiconductor industry trends. He gave his thoughts to William Fellows

The R-series: the only RISC not dominated by one vendor

Singing the praises of the MIPS Technologies Inc R-series RISC, John Mashey claims all other RISCs are dominated by one vendor, while the MIPS CPU is available from six. ast year 300,000 MIPS chips shipped, 100,000 in systems, from workstations to folks starting to get into Microsoft Corp Windows NT personal computers like Acer Group Inc, and there will be other ones later. He claims MIPS has the number one RISC slot in Japan, where sales of MIPS, Silicon Graphics, Sony Corp and NEC Corp-based R Series systems taken together are more than the Sun Microsystems Inc Sparc or Hewlett-Packard Co stuff. The other 200,000 parts are working in embedded control, such as printers. These are important because they ship for many years in very predictable flows, they don’t always need to be the newest technology, so they help pay the very high costs of building fabrication plants over the years. In effect the fabricators amortise the cost of producing new CPUs with something that doesn’t have to be the newest thing every year and a half. Canon Inc’s Colour Laser Copier uses the chip, as does the $800 Oki Electric Industry Co laser printer which is selling at 100,000 a month. Mashey expects over 1m MIPS chips to go into this embedded sector next year, which also includes things like X terminals, communications boards and telephone switches. Mashey also thinks MIPS could be in with a shout if and when Hewlett-Packard moves its hugely successful LaserJet line of printers to a new CPU architecture. Hewlett currently uses the Intel Corp 80960 RISC in the printers, and if, as Mashey believes, there is no new iteration of that part planned by Intel, he reckons the R and Advanced Micro Devices Inc Am29000 RISC will likely slug it out for the business.

All RISCs to survive the decade, but Alpha is strange

Unlike some other industry commentators, Mashey argues that most of the current mainstream RISC CPUs will survive in to the next millennium, although he has some specific views on their current technology standings. Digital Equipment Corp’s Alpha AXP he describes as strange CMOS, almost bipolar. The Precision Architecture RISC has no fast cache memory on the chip – the issue for Hewlett being that it runs a lot of wire at very high speeds on the board, which leads to a lot of manufacturing issues. Sometimes they get hand built by specially-trained elves, he quips. Moreover, it is not enough to know how fast the various architectures are, to look at cost trends you have to look at how much hardware there is. Another way to do that is to look at the size of the chip, and how many metalisation layers it has. More layers usually means more problems. However more layers stacked on top of each other means you can make the chip smaller, which means you get more on a wafer. The IBM Corp-Motorola Inc PowerPC has four layers. Hewlett is a three-layer unit, Alpha has three layers, Texas Instruments Inc’s SuperSparc has three and MIPS two. Two-layer implementations are easy to make and the MIPS part will soon get down to below $200 per chip, says Mashey. On a chip there are layers of insulator and layers of metal which connect up the transistors. The reason it is interesting, argues Mashey, is that it is in the layers and layering process that most defects occur. Layers of metal laid down on top of each other are very susceptible to breaking. If the chip gets too hilly in the layering process, the yield goes down. Mashey cites Alpa AXP, which he says is difficult to make because it uses a funky version of the process that uses big metal. Recently introduced planarisation techniques help reduce layering difficulties, but if you go to the extremes then it is still an issue, says Mashey. Indeed, the problem

DEC has had in finding partners willing to make the Alpha was due to an unusual flavour of CMOS, it used. DEC asked every single semiconductor manufacturer that as far as we could tell could possibly make Alphas to do so, and after 18 months it only got Mitsubishi to sign up. Alpha is not a fundamentally different architecture, says Mashey, the problem is that you put the chips in a microwave oven and turn all the knobs and dials up full. Fabricators don’t like re-calibrating all their systems to do it. They’d rather do someting closer to their mainline processes, because that’s how they get experience and yields.

The intractable numbers militating against Pentium

Mashey describes Intel Corp’s Pentium as the biggest microprocessor I’ve ever seen, and says that’s not surprising given the difficulty Intel has making its chips faster and faster, but still compatible with the iAPX-86 line. Pentium is good, in terms of the constraints and resources that Intel had, he says the question is, if you are Intel, how much profit do you give up if you build Pentiums rather than taking the 6 wafer and making 80486s? It costs $8,000 negative dollars per wafer, according to Mashey. The reason is the size. On the wafer you get a lesser amount of bigger chips and you get fewer possible chips that work. Pentium is 3.6 times bigger than a 80486DX/2 in the same technology – ignoring the three or four extra steps required to do the bipolar transistors. Pentium has 17 or 18 masks rather than the 80486’s 13 or 14. With the bigger chip there is more space around the edge of the wafer, and the holes are bigger for a bigger chip.

Just 47

Right now on a 6 wafer using 0.8 micron transistors, Intel gets 180 80486DX/2s. Just 47 Pentiums are possible. The question is what fraction of them work? Mashey says the effect is not linear, but exponential. Bigger chips are much less likely to work, because there is a bigger chance that they’ll run into problems. About 80 of the 180 80486DX/2s on a wafer work. About 0.5 Pentiums work, we think. Maybe it is one. What happens is that when you start to make chips, the defect rate is fairly high. As you get used to doing them, and the volume increases, so the defect rate comes down, until it levels out. There’s a lot more volume in the 80486s and that’s why Intel is already at almost 50% yield on the wafer. The best we can imagine Intel getting on the same overall defect rate curve over time is maybe four good Pentiums. The point is that Intel can ship and sell every 80486 that it makes, so any wafer that it uses to build Pentiums takes away from 80486 sales. Suppose Intel ships 100,000 Pentiums in the next 12 months – this is $800m of profit that is forgone on the 80486. Intel knows it is numbers like this. Even when Intel goes to 8 wafers and 0.6 micron technology, the same relative numbers will apply, says Mashey.