Hewlett-Packard Co lifted the veil a little further on its plans for the Precision Architecture RISC family at the HP/Apollo Workstation Expo company show in San Jose. According to Electronic News, the company said it will introduce a low-cost 7200 symmetric multiprocessing processor at the end of this month, and will next quarter add a 7150 board upgrade to ensure that the HP 9000 Series 700 workstations remain competitive with Pentium- and PowerPC-based machines. The 7200 is described as having a new cache design that the company intends to patent, as well as dual integer pipeline and bi-endian data support so that it can run Windows NT if users demand it. It will also offer higher bandwidth and lower latency and should appear in new HP 9000s and 8000s within eight to 12 months. The 125MHz PA 7150 is rated at 135 SPECint92 and 200 SPECfp92, and will be offered as a board upgrade for existing 700s. Further out, the company is working on a new generation PA 8000 family designed to issue four instructions per clock cycle – with clock rates of 200MHz and up. It will also feature a higher-bandwidth memory interconnect. And then there is the PA 9000, designed for use with those Very Long Instruction Word Trace compilers, set for the end of the decade. Hewlett-Packard calls the new architecture, which will retain binary compatibility, super-parallel. It should offer 1,000 SPECint92 performance, and will greatly simplify and reduce the transistor count of the basic chip design by leaving it to the compilers to check for resource contention when multiple instructions are issued simultaneously, instead of implementing the contention checking technology in hardware.
