Sunnyvale, California-based Advanced Micro Devices Inc has extended its Am29000 RISC microprocessor family with the Am29040, claiming that it provides a substantial increase in embedded system performance while reducing system costs. It enables embedded systems designers to use inexpensive dynamics, has a two-bus external architecture that decreases system glue logic and an eight-, 16- or 32-bit instruction interface. Programmable Bus Sizing technology gives designers the option of using either a 16- or 32-bit data interface. It includes an 8Kb instruction and 4Kb data cache on chip, has an integer multiplier in hardware and Scalable Clocking technology. It is claimed to deliver more than 65 Dhrystone MIPS, twice the performance of the Am29030 at the same bus frequency. With a 25MHz external bus, it is claimed to outperform the 40MHz 80960CF by up to 40%. It also has a fully static design and operates off 3V or 5V. It will be available in 33MHz, 40MHz and 50MHz operating frequencies and will begin sampling in September in a 145-pin pin grid array at $83 each for 10,000-up. A 144-pin plastic quad flat pack version starts sampling in November at $72 for 10,000-up.
