US chipmaker Xilinx has released a new data centre accelerator card that has been designed to fit into standard PCIe server slots and run on any server.

The company describes it as the “first adaptable compute, network and storage accelerator card built for any server, any cloud.”

The FGPA-based card can be used to turbocharge workloads like electronic financial trading, financial risk modelling, video transcoding or machine learning.

It is the first half-height, half-length and 75-watt card in Xilinx’s Alveo family. It is currently being sampled now by OEMs, with qualifications in place.

General availability is anticipated later in Q3, 2019.

“Ever-growing demands on the data center are pushing existing infrastructure to its limit, driving the need for adaptable solutions that can optimise performance across a broad range of workloads and extend the lifecycle of existing infrastructure, ultimately reducing TCO [total cost of ownership],” said Xilinx’s Salil Raje.

He addedL “The new Alveo U50 brings an optimised form factor and unprecedented performance and adaptability to data center workloads.”

The Rise of FGPA Accelerators 

FPGAs are silicon devices that can be dynamically reprogrammed with a hardware design and data path that exactly matches a user workload.

As the data processing workloads required for many cutting edge or highly competitive data centre tasks grow ever more testing for hardware, companies like Xilinx and other chipmakers are increasingly promoting the use of task-specific FGPAs, which offer the flexibility for reprogramming should requirements change.

(While this has typically been a deeply challenging task, FGPAs are now commonly programmable in the widely used C language).

As Intel’s Stefano Zammattio earlier put it to Computer Business Review: “An FPGA is an array of logic gates and other hardware resources that are extremely flexible.

“Like a Lego-block building kit, these resources can be connected together to build your own custom hardware design to meet your specific needs, whatever they are. You can trade off application performance against FPGA resource utilisation.”

xilinx acceleratorXilinx Accelerator: The Specs

The new Xilinx accelerator card, (which offers 8 GB of HBM2 at 460 GB/s bandwidth) will work in any server, on any cloud.

Dubbed the U50, it boasts some impressive specs:

  • 20X lower latency and sub-500ns trading time compared to CPU-only latency when running financial trading workloads
  • 4X higher throughput per hour compared to in-memory CPU for database queries against the TPC-H Query benchmark
  • 7X better power efficiency than a GPU running the Monte Carlo simulation

The release is the fourth in its Alveo family; a steadily growing line of data centre acceleration cards brought to market as the company transitions from a FGPA-only business to a more diverse platform provider.

In terms of connectivity, the accelerators host two SFP-DD plugable connectors. Each connector can support 2x25G or 2x10G speeds using optical modules or cables. A 161.1328125 MHz clock is provided to the SFP-DD or QSFP28 interface so that different Ethernet IPs can be enabled. Each connector is housed within a single SFP-DD cage assembly located at the I/O bracket.

The company rolled out some high level partners including AMD and IBM to tout the card’s benefits. AMD’s CTO of application engineering, Raghu Nambiar said: “Taking advantage of AMD’s leadership, first x86 server-class PCIe 4.0 CPU, the Alveo U50 will be the industry’s first adaptable accelerator card with PCIe 4.0 support.

“We look forward to working with Xilinx to combine the benefits of AMD EPYC based solutions with Alveo acceleration to hyperscale and enterprise customers.”

Steve Fields, chief architect for IBM Power Systems added: “We believe the combination of low-profile form-factor, HBM2 memory performance, and PCIe Gen 4 speed to interface with IBM Power processors will enable the OpenPOWER ecosystem to provide cutting edge adaptable acceleration solutions.”

See also: If Moore’s Law’s Dead, What Now for Silicon Valley? The CEOs of Arm, Micron, Xilinx Have their Say