Mountain View, California-based Synopsys Inc, which develops circuit design software, has announced a new field-programmable gate array compiler for the speedy development of complex, high performance chips. It follows the launch in December of the company’s two new synthesis tools for ASIC designs: DC Professional and DC Expert both of which incorporate high-level design synthesis-to-layout technology co-developed with SGS Thomson Microelectronics BV. The new compiler targets what Synopsys reckons to be the fastest-growing segment of the integrated circuit market – an assertion based on Circuit Enginering Inc estimates that the field-programmable array sector will be worth around $381m in 1993,rising to $507m in 1994, $681m in 1995, and $905m in 1996.

Time-to-market

Field programmable gate arrays are coming in to their own because of the need for fast time-to-market. They are easily re-programmable, and are ideal for producing prototype silicon, which can be geared to specific system functions, quickly. They are especially useful for producing items like video boards, which can be converted to fully optimised ASICs once production volumes are high enough to reduce costs. Though they lag behind ASIC technology, field-programmable gate arrays are improving all the time and currently offer around 20,000 gate densities with over 50MHz clock rates. This makes them a viable alternative for over half of today’s designs in terms of gate count, and for nearly 36% in terms of speed. The new compiler enables users to get the most out of available technology with its industry standard High Level Design Automation tools. It also enables users to choose the best architecture for their systems from the offerings of several vendors, unlike traditional proprietary high level design tools. The current version is optimised for Xilinx Inc and Atmel Inc architectures, and is supported by libraries from Altera, AT&T, Crosspoint, QuickLogic and Texas Instruments. It automates much of the logic implentation involved in circuit design and can be used for fine-tune designs. It also uses hard macros – pre-defined blocks – that enable smart re-use of designs. It is compatible with Synopsys’ DC Expert and DC Professional Synthesis tools that translate designs specified in VHDL and Verilog hardware description languages into over 162 ASIC technologies from other vendors. This is useful for those wishing to migrate their designs to ASIC devices. The verdict from compiler test sites has been encouraging so far. The Supercomputing Research Centre of the Institute of Defense Analyses, Bowie, Maryland was able to raise the speed of one processor board design to 18MHz from 9MHz using the compiler, for instance.

By Lynn Stratton

Others saw improvements of between 4MHz and 13MHz in their designs. The compiler is written in C, runs under Unix and requires X Window and TCP/IP. It can be used on Sun, HP/Apollo, DECstations and IBM’s RS/6000 machines with at least 32Mb of memory. It is available worldwide as a stand-alone product for $31,000; as an add-on to the DC Professional and DC Expert ASIC products for $19,000; and in a High Level Design Package that includes Synopsys’ HDL compiler, Design Analyser and VHDL System Simulator, for $75,000. US customers can expect to pay 75% of these prices however, because the cost of doing business there is cheaper, according to Synopsys. The new DC Professional and DC Expert logic synthesis products replace Synopsys’ Design Compiler Version 3.0. DC Professional is for standard ASIC design and offers automatically generated constraints, point-to-point timing constraint and detailed timing analysis. DC Expert is a more complex package for leading edge ASIC designs. It offers critical path re-synthesis that Synopsys reckons improves performance by up to 15%; and in-place optimisation that corrects post-layout paths that are five to ten per cent out of specification. Together with the other products in Synopsys’ Design Compiler range, DC Professional and DC Expert feature special technology, co-developed with SGS Thoms

on, which eliminates the need to manually optimise designs at the layout stage. Synopsys is now working closely with its leading semiconductor partners, which include AT&T, LSI Logic, Motorola, National Semiconductor, NEC Corp Texas Instruments and VLSI Technology, to incorporate vendor-definable non-linear delay modelling into the technology. This will improve accuracy and compile times, Synopsys says. It should be available in June. Synopsys, which saw $63m revenues in 1992, is expected to turn in around $98m this year. Formed in 1986 with the help of General Electric Co, Synopsys – an acronym for Synthesis and Optimisation Systems – has grown to 425 employees and boldly went public last February (CI No 1,842). It has seven US offices; European bases in Reading, Munich and Paris; and Far Eastern units in Korea, Taiwan and Tokyo. Its Japanese subsidiary, now known as Nippon Synopsys Co. Ltd, was acquired from Sumitomo Corp last July (CI No 1,958). Its overseas investment appears to be paying dividends. International business revenue increased 73% last year to produce 43% of Synopsys’ total revenue. Half its top 10 customers now are non-US based.

Universities

The company is also making its technology available to universities through the Eurochip Consortium, in the hope of encouraging the use of high level design techniques. Its product range includes Design Compiler for CMOS designs; an Emitter-Coupled Logic Compiler; Hardware Description Language compilers; VHDL System Simulator; Test compiler for testng performance, area and fault coverage; and its DesignWare family that include the Synthetic Design component libraries and DesignWare Developer for designers wishing to build their own inventories. These products are used by over 500 semiconductor, computer, communications, consumer electronics and aerospace companies worldwide that include Siemens AG, Apple Computer Inc, Sun Microsystems Inc and Silicon Graphics. The ASIC’s for the Video Subsystem Controller Chip in Apple’s Powerbook Duo, for example, were designed using Synopsys’ technology; as were several of the chips in NeXT Computer Inc’s workstations, Silicon Graphics’ Iris Crimson and Iris Indigo lines and Nokia Oy’s new cellular phone. According to Dataquest, Synopsys had captured some 72% of the world’s logic synthesis market by 1991 – a position it is determined to hold on to in 1993.