Arteris has rolled out a new P-NoC peripheral interconnect product which is developed to address the integration of peripherals in System-on-Chip while using minimal number of wires and gates.
Arteris said that the new P-NoC is developed for the connectivity of peripheral IP cores such as timers, USB, infrared interfaces, control communications, audio, touch screen, and other functions. It can also be used to communicate to the programming interfaces of all IP cores in an SoC.
The company said that the new P-NoC is supported by a suite of Arteris NoC generation and verification tools for enhanced design turnaround. The NoCcompiler tool allows configuration of the peripheral interconnect and generation of Verilog, VHDL and SystemC representations. The NoCverifier supports automated verification of the peripheral interconnect.
Charles Janac, president and CEO of Arteris, said: “Arteris P-NoC is supported by a silicon-proven NoC Element IP library and a full suite of design and verification tools that is fully compatible with industry standard IP interfaces. Together with the Arteris NoC Solution, the Arteris P-NoC allows our suite of capabilities to address all requirements for SoC interconnect including, top level interconnect, block level interconnect, peripheral interconnect and interchip links.”
