By William Fellows
Claiming to have relaunched its Unix strategy, IBM Corp duly announced a raft of new RS/6000 server and system software products yesterday in a bid to overhaul Sun Microsystems Inc as the industry’s number one supplier of Unix systems. When RS/6000 was formed in 1990 IBM claimed it would be in the top position within four or five years. This time around IBM, which is currently ranked third in the market, is a little more coy. It won’t say when it aims become number one but claims it will begin to win back share from Sun within 12 to 18 months.
Its plan to become the number one player in revenue terms means it can count money it makes from associated consulting and services in the total. Selling the most units is a secondary goal. VP product management and segment solutions Debra Thompson said that IBM will succeed this time around because of the amount of money IBM is willing to throw at the plan.
Next year IBM will begin selling servers incorporating Power4 chips which incorporate and support the compute-intensive Power CPUs and ‘Star’ series instruction sets developed by the AS/400 division. IBM said it tested early versions of Power4-based CPUs at the end of last year. The 1GHz Power4 is manufactured in IBM’s S8 process, which adds a silicon-on-insulator layer to the S7 copper connection process.
Using S8 IBM can also squeeze two Power4 CPUs on a single die. Four CPUs will be packaged on a chip module and four modules can be accommodated on each board, allowing for the development of servers with 16, 32 or more CPUs. The two chips packaged together share 1.5Mb on board L2 cache. IBM will also offer a third level of cache on Power4 systems. The Power4 design also sports a 500MHz wave pipeline interface, which IBM says is a way of maintaining a flow of data to the CPU so that no cycles are wasted when the chip is idling while it awaits new instructions. It uses techniques called out-of-order and speculative execution already adopted by other CPU makers.
RS/6000 is now on a third generation of the PowerPC RS64 CPU developed for it by the AS/400 division. AS/400 took a subset of the multi-chip Power RISC instruction set design and added other instructions to support its proprietary server architecture. It culled a version of this chip for use in RS/6000 servers designed for the commercial marketplace. Other RS/6000s targeted at scientific and technical markets use the Power architecture, which is designed to support more floating-point and compute- intensive tasks. The 450MHz RS64III used in the new S80 Condor server range succeeds previous versions called Apache and Northstar. It will be followed by Istar a 500MHz design manufactured with SOI that will be used in RS/6000 and AS/400 servers.
Power3, which is used in RS/6000 workstations and high- performance SP parallel system nodes, is being cranked from 222MHz to 350MHz as the Power3+ and will ship in a new generation of workstations due early next year. A follow-on Power 3++ running at 500MHz will be the last iteration of a discreet Power architecture before Power4 is cooked.
