The $8m Actel Corp handed over to save Gatefield Corp from bankruptcy two weeks ago has blossomed into an alliance that seeks to take on the $4bn gate array market with a new class of Flash-based field programmable gate array (FPGA) devices.

Sunnyvale, California-based Actel’s new ProASIC 500K device family was developed by GateField, but nearly didn’t make it to market after the Fremont, California company almost ran out of money (CI No 3,675). Now, according to Tim Colleran, Actel’s senior director of product marketing, his company is backing ProASIC with its own ASICmaster design toolset, a range of 50 ProASIC reference designs, marketing expertise and a fabrication partner in the shape of Siemens’ Infineon unit.

Gatefield wasn’t going to succeed in the FPGA market without a channel, and without volume manufacturing, said Colleran. With these deficiencies made up for by Actel’s involvement, the two companies are targeting the ProASIC FPGAs at parts of the ASIC market that have previously been closed to FPGA products, and expect some features of their new devices to significantly accelerate the migration of ASIC designers to re-programmable chips.

The ProASIC features that Actel claims will attract new interest in FPGAs from ASIC designers include very low power requirements, compatibility with a wide range of existing ASIC design tools, and non-volatile live-at-power-up characteristics. Also, unlike SRAM-based FPGAs, such as those made by Actel’s chief rival, Xilinx Inc, the new Flash FPGAs can also be protected against reverse engineering, making them a more secure platform for the software intellectual property of systems builders.

In its first iteration, the ProASIC range will be made in a 0.25 micron embedded Flash process by Infineon Technologies in Germany. At 2.5 volts, Actel claims the devices will deliver power savings three times greater than those possible from an equivalent Altera 10K 100E chip running at a little over 50-MHz, while power savings at 100-MHz will be four times greater than those possible with Xilinx XCV300. Translated into systems-level savings, Colleran said this means smaller fans, less spacing on the board, meaning smaller cages and a generally less demanding design process for systems builders.

The ProASIC devices will also be physically smaller than most equivalent devices, capable of providing a gate density of up to 1.2 million on die size as much as one-third of the size, Actel claims. At the higher end, a ProASIC device will be able to carry as many as 2 million gates on a 0.22 micron part, compared with the 1 million possible on other similar parts.

The real key to attracting ASIC designers, however, will be access to design tools, said Colleran. As well as Actel’s own ASICmaster toolset, early customers of the ProASIC range will also find that most of their existing ASIC tools will be able to work against the Flash FPGAs with only minor alterations. Most ASIC tools are really designed around optimization for two inputs gates. We’re not quite there, but we’re as close as you can get, Colleran claimed.

As a new category of device the Flash FPGAs are expected to be more expensive than SRAM chips, and Colleran said that the smallest ProASIC devices, as they begin volume manufacturing early in 2000, will sell for around $10. However, he promised that as we drive towards volume, we’ll do what we need to do to meet the market on price.

For Actel, the likelihood that the ProASIC family will prove attractive to ASIC designers is a mouthwatering prospect. At the moment, the company’s existing antifuse FPGA products are pointed at a $200m market for re-programmable parts. As a potential alternative to a wider range of ASIC’s, the ProASIC is relevant to a $4bn gate array market, of which Actel is confident it can win a 2% market share within a year. This means it should be possible to create a $200m product family fairly early. We expect significant revenue [from ProASIC] in 12 months, although we will be shipping low quantities to start, Colleran said.