Intel is falling in behind other industry players in the RISC/Unix market, who correctly reckoned several years ago that cranking up clock speeds could not be the means to increase performance because of practical thermal limits on our desktops and in corporate data centers.

This time last year, Intel was somewhat embarrassingly revealing its clone of rival Advanced Micro Devices’ 64-bit memory extensions for its Pentium and Xeon processors, and this year, Intel’s dual-core and future multicore plans are once again far behind the RISC/Unix market and significantly behind the multicore plans of AMD, which is expected to deliver dual-core Opterons around the middle of this year.

To Intel’s credit, once the company realized the inevitability of the 64-bit memory architecture, dubbed x86-64 by AMD and called EM64T by Intel, it swallowed its pride and activated the 64-bit memory extensions that had been lurking inside the Prescott Pentium 4 chips and rolled out the Nocona Xeon DP processors.

And in that year’s time, Intel has sold some two million 64-bit Xeon processors, proving once again that when a market wants something, Intel can and will shift gears to meet customer needs and competitive challenges.

While Intel was never clear on how far it was going to push clock cycles, it is reasonable to assume that the company was perfectly willing to keep on this track of cranking cycles to improve performance, perhaps pushing clock speeds to 5GHz or 6GHz instead of adopting a multicore strategy.

It is far simpler to create a single-core chip with a high clock speed than to perfect the multicore chip designs and multichip module packaging that is one of the crown jewels at IBM Microelectronics (which makes the dual-core Power4 and Power5 chips as well Hewlett-Packard’s PA-8800 processors).

But desktop and server makers and their customers, seeing the benefits of performance that came with the multicore approach, indicated to Intel several years ago that they did not want to deal with more heat in their offices and data centers, which caused Intel to go back to the drawing board and find another way to keep Moore’s Law alive and deliver more performance with the ever-increasing transistor counts that improvements in chip making methods afford.

The fact that Intel is far behind the RISC/Unix players and probably 6 to 9 months behind AMD on delivering multicore processors for the server market is all the evidence you need to know that this was not part of whatever original plan Intel had for its Pentium, Xeon, and Itanium processors.

But the fact that Intel has relatively quickly changed gears on multicore designs, will soon deliver multicore desktop chips and will get multicore server chips into production by the end of this year, shows that the company is as practical as it is competitive. When the industry shifts, Intel shifts, which is why Intel is today a processor company and not a memory company. It is also why Craig Barrett, Intel’s soon-to-retire CEO, and his top lieutenants talk about multicore processors almost as if it were their idea, as if what Intel means by Moore’s Law has always been counting the aggregate number of transistors per socket instead of counting the number of transistors on a single piece of silicon. Maybe Intel thought it would get to multicore designs eventually, but clearly it did not plan for such chips back in the late 1990s and early 2000s.

But once Intel makes a shift, it makes a shift. We are no longer running hell bent for 5 GHz and 6 GHz, and that makes product planning a lot easier, Mr Barrett explained in a question and answer session following his opening keynote at the Intel Developer Forum in San Francisco yesterday.

He explained that what Intel would be focusing on is adding processing power to systems by ramping up through 65 nanometer to 5 nanometer chip making technologies between now and 2020, and that the company would be focusing on adding processor cores and execution threads to its chips to boost performance. When questioned about the limits of Moore’s Law, Mr Barrett was optimistic based on the failure of past pessimism.

We have been forecasting the death of the transistor out fifteen years from now for the past fifteen years, he said. In his keynote, he said he had called Mr Moore to congratulate him on the validity of his law, and said he looked forward to celebrating its 50th year in 2015. He said that silicon had plenty of life left in it, and the one thing that history has taught him is that the clever engineers and physicists of the world will come up with some technology that will save the day.

It might be quantum dots or carbon nanotubes – areas that Intel is investigating – and he is not sure what it will look like. But he seemed pretty certain that the technologies that Intel has developed to make chips on silicon would be relevant on whatever future chip technology the next generation of geniuses comes up with.

In the meantime, Intel has to worry about silicon and getting dual-core chips into production so it can blunt an attack from AMD. While Intel is to be commended for bringing some true dual-core chips to market this year in its desktop systems, the fact that the future Dempsey dual-core Xeons are really two single-core Nocona processors jammed together in a multichip module that plugs into a regular Xeon socket is a bit disingenuous, even if the effect is largely the same as putting two cores on a single die.

The approach that Intel is taking with these Xeons is, according to Pat Gelsinger, co-general manager of Intel’s new Digital Enterprise Group, has to do with balancing manufacturing costs against the desire to get as many cores as possible into a single processor socket. What this looks like from the outside is that Intel took the same tack that Hewlett-Packard did with the PA-8800 in the aftermath of the very aggressive sales IBM received for the truly dual-core, single chip Power4 servers, which was to slam two PA-8700s on a single multichip module.

HP had to do this mainly because of the early delays in the 1990s for the Itanium processors, which meant HP did not have the kind of performance that it needed to compete with IBM. This also why HP created its own mx2 dual Itanium 2 processor modules, which make a baby SMP server out of two Madison processors and then plugs it into a single Madison slot.

Even the future Montecito Itanium 2 processor was originally supposed to be delivered in late 2004 as a single-core processor, and only after it was apparent in the server market that dual-core designs were going to be what customers wanted (as opposed to increasingly faster but equally increasingly warm processors) did Intel shift gears and move to a true dual-core design with Montecito. That move essentially pushed Montecito from its expected delivery in mid-2005; now, Intel is saying that it will have the chips done some time in the second half of the year.

Presumably, Intel will eventually get true multicore processors across its entire PC, workstation, and server processor lines, and that these are in fact the 10 multicore development projects that Gelsinger indicated Intel has underway right now.

The company has five dual-core chips that it is getting ready to bring to market today: the Montecito Itanium, the Dempsey dual-core MCM Xeons, the Presler dual-core MCM Pentiums, and the Smithfield dual-core Pentium 4s, the latter of which is a true dual-core design.

Stephen Smith, a vice president in the Digital Enterprise Group, gave a presentation at IDF yesterday that showed Intel expected that by the time the company exits 2006, it expected 70% of its mobile processor shipments would be for chips with at least two cores per socket, with a similar penetration on desktop processors. And in the server space, Intel expects that more than 85% of machines will have more than one core per socket as 2006 comes to a close.