Multi-part 4m transistor TFP is taped out

MIPS Technologies Inc says its multi-part 4m-transistor streaming superscalar TFP chip, the one that’s supposed to go into the high-end Silicon Graphics Inc Power Challenge shared-memory symmetric multiprocessing box by the end of the year, has made it to tape-out after some delays. Toshiba Corp will be making the part, which will probably cost just under $2,000 and the boards it will plug into are all ready for it. A second fab will be added soon – in view of MIPS’ disastrous Emitter-Coupled Logic flirtation in the R6000, which was manufactured solely by the now-defunct Bipolar Integrated Technology, MIPS says it will now always have at least two sources, for its products. Despite MIPS’ Windows NT proclivities, the cost structure on the TFP will likely make it a Unix-only affair. Silicon Graphics is looking to produce a box to take it up against Convex Computer Corp, Cray Research Inc and IBM Corp at its high end and 200MHz Digital Equipment Corp Alphas when they become commercial. The chip is called TFP for what the MIPS-Silicon Graphics combine trusts will be a monster floating point performance that is currently estimated at 200 SPECfp92. It should register between 85 and 90 on the SPECint92 scale and thereby put the raw power of 18 Cray Y-MP supercomputers on a single chip set.

Single-chip Terminator tapes in 12 months

Meanwhile, the MIPS T5 Terminator CPU, the single-chip successor to the R3000, R4000 and R4400, will tape out around a year from now, with production systems expected some 10 or 11 months thereafter. The T5 will perform out-of-order speculative execution to speed throughput and start life as an 0.35 micron part. So far this technique has only been applied in LSI Logic Corp’s ill-fated Lightning Sparc. That project was turned over to Metaflow Technology Inc last year – another failed effort, bankrolled by Hyundai Electronics Co, dubbed Thunder Sparc. MIPS thinks it will succeed because of the masses of diagnostic and simulation resources it is throwing at the thing – and we’re good, boasts MIPS’ famed director of systems development, John Mashey. Not all of MIPS’ six fab partners will take on the T5 – only two are currently equipped for 0.35 micron production in any case. R4000 upgrades will follow T5 – 200MHz, 0.6 micron implementations with more cache memory. These are what would have been known as the R5000 – MIPS has abandoned that effort saying it can get the extra speed and cache without a complete re-design. MIPS will shrink all of its processors down to 0.6 microns or below over time and expects T5 to slim down to 0.25 microns by 1996. This will be the starting point for MIPS’ next-generation single-chip R series implementation, which is expected to combine TFP, T5 and VRX features.

MIPS Open Design Center shows off RISCPC/ISA kit

MIPS Technologies Inc’s Open Design Center has been showing off an initial prototype of its RISCPC/ISA instant MIPS kit. This, however, isn’t the one it wants to get to. This one’s a PAL design and using programmable array logic means it can be used only for high-end desktop machines. The more compact ASIC-based design, which is where MIPS really wants to get to, won’t be ready until Comdex/Fall towards the end of the year. The ASIC design will enable them to get into portables and laptops, even notebooks. MIPS is courting all the personal computer cloner makers. It says they will be able to simply replace the 80486 Intel chip in their personal computers with an R4000 CPU daughter board for twice the performance of Intel. The kits can also use the more powerful R4400 and portables are slated to take the recently announced R4200 or low-cost low-voltage VRX processor.

Low-power VRX could be ready for Comdex/Fall

Although MIPS Technologies’ low-power VRX, or R4200, will not be taped out until next month and is not due to sample until late this year, the processor – destined for portable Windows NT systems and manufactured by NEC Corp – is expected to make a showing in some guise at Comdex/Fall. The two firms hop

e to get the cost of the thing down to $1 per SPECint92 – or around $50 but it is proving a difficult job, MIPS says. We’re also told to expect a bunch of new derivatives of the R3000 for the consumer products industry out of the Sony Corp stable fairly soon.

Pellucid abandons hardware to specialise in OpenGL conversion

Pellucid Inc, the Mountain View, California-based Silicon Graphics Inc spin-off just bought by audio specialist Media Vision Inc for $15m in stock, has shelved its attempts to peddle patented Microsoft Corp Windows NT systems designs that incorporate both Intel Corp and MIPS chips. The novel designs, which resulted in the creation of an 80386-R3000 prototype built by people that designed Silicon Graphics’s Indigo system, attempted to resolve the difficulties software emulators are having running legacy personal computer applications under NT (and Unix) by simply letting them run natively on an Intel chip without the user being aware. In fact, the machine was called the HardPC in contrast to Insignia Solution’s SoftPC MS-DOS and Windows-on-Unix-and-NT emulator as well as the RISC-86. Pellucid was unable to find any OEM customers interested in the kits and even Silicon Graphics, then a 5% minority owner, failed when it tried bidding the machines. ClieNT Server News reports that Pellucid has chosen high-end graphics as its new mission, converting Silicon Graphics’s OpenGL – which it has licensed to various chips to be used with Windows NT. Silicon Graphics and Microsoft are currently converting OpenGL to the next iteration of Windows NT. However, it could be this time next year before that software is released. In the meantime, other vendors such as NEC, Pellucid’s first customer, are interested in whatever OpenGL capabilities they can get their hands on. Pellucid has converted a software-only OpenGL software development kit for Windows NT for the 80486 and MIPS R4000 and intends adding Alpha and Pentium versions, according to OEM sales director Ross Smith. The Pellucid implementation does not optimise OpenGL the way the Silicon Graphics-Microsoft version will once it is done. Microsoft will be creating a path inside NT for OpenGL to bypass software constraints and add hooks for hardware accelerators that will exploit the Silicon Graphics technology. Pellucid is hoping to release its stuff as a product later this month at PC Expo in New York for around $1,000.

Wyse uses MIPS chip in new volume X terminals

Wyse Technology Inc, one of the giants of the terminal industry, is at last preparing to enter the X-terminal business with a full range of systems. For the last year or so its lone X-terminal was the monochrome X5 which, the company maintains, has sold in large numbers with a minimum of marketing efforts. Now Wyse is convinced that there is enough volume in X-terminals for it to sit up and take notice. It has pencilled in September as the launch date for five X-terminals, sneak previewed on its stand at Xhibition last week. The systems result from its partnership with sister company Link and with X software house Visual, of Westborough, Massachussetts. Wyse refuses to give pricing or projected volumes, but has a low-end 14 monochrome 68020-based system expected to come in under the crucial pricepoint for low-end X-terminals – that’s under $1,000. The high-end systems use a MIPS R3000 derivative RISC chip, and could replace low-end workstations for some applications, said Wyse. Using Visual-supplied software it can run local clients, such as the Motif Window manager, minimising network traffic. Facilities for sound are also included. Wyse says the other independents, such as Network Computing Devices Inc and Tektronix Inc, should worry about it entering the market, but Hewlett-Packard has been one of the strongest players in X-terminals of late. It will manufacture the terminals, in volume, at its Taiwan and US plants. At Xhibition, Wyse had high-resolution Sparcsystem monitors at half Sun Microsystems’ price. – William Fellows and Maureen O’Gara