At its Cupertino, California development establishment, DEC was last night due to reveal some of the chip packaging secrets that will go into its forthcoming Aridus top-end processor, dubbed by observers the VAX 9000. Describing the meeting as an extraordinary briefing, the company was promising to describe a multi-chip packaging that it claims more than doubles performance compared with conventional circuit board technology. The company says it is achieving circuit packing densities up to 30 times greater than with ordinary printed boards. Key to the claimed breakthrough is a new interconnection technique that DEC calls High Density Signal Carrier, produced using copper and a polymide, which it claims reduces the space needed by its high-end ECL chips to the point where the equivalent of four very large printed circuit boards can be implemented in a 5 square package. Up to 72 high-density integrated circuits can be bonded onto the new Signal Carrier, and each of these is then mounted on a Multi-Chip Unit, which is claimed to provide excellent heat dissipation and can be air cooled, and which provides the physical and electrical connections from the system to each of the Signal Carriers. Several Multi-Chip Units can then be combined on a Planar Module to build the high-performance computer in a restricted space – and one of the keys to performance is to get the chips as close to each other as possible to reduce propagation delays. DEC stresses that while their combination represents a breakthrough, all the elements of the concept use standard semiconductor processing equipment and techniques. The new DEC technique is designed to solve the same problems of tight packaging and dissipation of intense heat for which IBM designed its Thermal Conduction Modules, where the chips are mounted on a ceramic substrate, with a water-cooled heat exchanger mounting atop each chip but DEC will argue that its own ap proach obviates the need for water cooling. The company – which invested in the ill-fated Trilogy Ltd venture in the hope of get ting a short-cut to innov ative chip packaging tech nologies, says it has been working on the new pack aging technique since 1984.
