Synopsys has rolled out Galaxy Constraint Analyser, a new tool which reportedly enhances designer productivity through constraint analysis technology developed for the company’s Galaxy Implementation Platform.
Synopsys said that the new tool enables designers to assess correctness and consistency of timing constraints. Correctness and consistency enables runtimes in the company’s Design Compiler synthesis and IC Compiler physical implementation tools.
In addition, the new tool features constraint debug capabilities to enable designers eliminate long ‘trial-and-error iterations’ during implementation, the company said.
Synopsys claims that the new tool provides a set of rule checks designed to enhance efficiency of Design Compiler synthesis and IC Compiler physical implementation. In addition, the new tool uses technology based on the company’s PrimeTime timing engine to provide correct interpretation and propagation of constraints.
Reportedly, the new tool’s ability to offer constraint analysis on 10-million-gate designs, combined with a set of interactive analysis and debug capabilities, enables designers to identify and fix constraint issues.
Robert Hoogenstryd, director of marketing for design analysis and signoff at Synopsys, said: We built the Galaxy Constraint Analyser using technology based on the PrimeTime golden timing engine to help designers produce highest quality constraints for the Galaxy Implementation Platform.
