On June 10 Intel Corp was awarded US patent number 5,638,525 for a processor capable of executing programs that contain RISC and CISC instructions; i.e. Merced. It filed the claim on February 10 1995, some six months after it went public with its chip development agreement with Hewlett-Packard Co. The data processor is capable of decoding and executing the first instruction of a first instruction set and the second instruction of a second instruction set wherein the first instruction and the second instruction originate from a single computer program. Alternatively, the data processor can also execute a first instruction of a first instruction set in a first instruction set mode, receive a first interruption indication in the first instruction set mode, service the first interruption indication in a second instruction set mode, return to the first instruction set mode, receive a second interruption indication in the first instruction set mode, and service the second interruption indication in the first instruction set mode. So that’s cleared that up, then.
