TeraFLOPS is main theme of the Paris show, which as expected is dominated by the US
This month’s Supercomputing Europe ’92 exhibition at the CNIT trade centre, La Defense, Paris – the fourth annual European supercomputing event organised by Royal Dutch Fairs – was a lively affair. An event of growing importance, the show played host to 31 exhibitors including European firms Parsys Ltd, Telmat Informatique SA, Siemens-Nixdorf Informationssysteme AG, Parsytec GmbH, Meiko Scientific Ltd and Transtech Parallel Systems Ltd. The Europeans, however, were predictably outnumbered, but not necessarily outperformed, by the big US names – Intel Corp, IBM Corp, Cray Research Inc, Convex Computer Corp, nCube Corp, Thinking Machines Corp, Digital Equipment Corp, Silicon Graphics Inc, Alliant Computer Systems Corp, MasPar Computer Corp and Star Technologies Inc. Over 2,000 delegates and journalists passed through the exhibition, exceeding expectations and demonstrating the level of interest that supercomputing is generating these days. TeraFLOPS was the overriding theme of the show, which was opened by a customary keynote speech by Cray Research chairman and chief executive John Rollwagen, who spoke of Cray’s plans to use DEC’s Alpha RISC microprocessor in its first-generation massively parallel system due next year (CI No 1,860). Cray’s three-phase massively parallel computing programme aims to deliver a 100 GFLOPS multiple-instruction machine by 1993, a machine scalable to a peak of 1 TFLOPS in 1995, and a monster capable of sustaining TeraFLOPS performance in 1997. Thinking Machines, of course, believes it is already the champion of the TeraFLOPS race, though no-one – surely not even those wealthy US research institutes – is going to pay $320m to get its maximum configuration now. Intel, which in our opinion rivals IBM in being the supercomputer supplier with the lowest profile, was a little more realistic and conceded that its new Paragon 80860-based supercomputer, while theoretically scalable to TeraFLOPS now, will not be shipped in this form until 1995. Parsytec, the Aachen, Germany-based Transputer systems manufacturer was embarrassed by the continued delay of the latest T9000 Transputer, which it had been relying on to build some 30 GC Series machines this year, initially scalable to 400 GFLOPS, to tackle TeraFLOPS at some unspecified date in the future. Alliant, which didn’t have a stall but made up for it with a mega press briefing featuring about five different case studies, says it is also on the TeraFLOPS path with its massively-parallel 80860-based Campus architecture, hoping to reach the finishing post by the mid-90s. And IBM took the floor to shout about its massive parallelism intentions with the Vulcan RS/6000-cluster project (CI No 1,860), which aims to scale up to TFLOPS performance by 1995. And so it went on. It would have been easy to forget that the show was a European one, but for the GP MIMD Esprit consortium, which made a big splash at the exhibition with the launch of the Concerto multi-vector minisupercomputer (CI Nos 1,859, 1,865), which is positioned directly against Intel, Alliant and the baby Cray Research supercomputers, based on the not-so-European Intel 80860 and the Sun Microsystems Inc Sparc RISC chip. The consortium also pledged a TeraFLOPS machine – an extended version of Concerto, said Parsys’s Ian Coburn, to be available next year in a form that’s theoretically scalable up to TFLOPS.
Parsytec, out of GP MIMD, focuses on image processing while waiting for late T9000
Parsytec GmbH, the Aachen, Germany-based Transputer systems company which one time was the fifth member of the Esprit GP MIMD supercomputing team (CI No 1,865), used its stand to show off a prototype model of its GC Series T9000-based MIMD super massively parallel machine, scalable up to 16,000 processors and theoretically capable of 400 GFLOPS (detailed in last June’s Computergram issue no 1,704). Of course the T9000 Transputer has been delayed and won’t be available until the back end of this year, so the prototype contained
old T800 chips. The reason for the model, the company said, was to demonstrate that the monster system isn’t as physically huge as some would believe – a full 16,000-Transputer configuration would measure 20 square feet. Parsytec might consider it an exaggeration to say that the lateness of the T9000 has been disastrous for the company, but when it launched the GC Series last year, Parsytec had been banking on $5.5m worth of orders for the new machines to show in its 1991-92 financial statement. The company was also hoping to build 30 systems this year, projecting $100m sales by 1995. These plans have all been scuppered by the lateness of the newest Inmos Transputer, and Parsytec has in the meantime been keeping rather a low profile. The company, which turned over the equivalent of $9m in 1990, achieved $15m for the year to August 31, 1991 – better than the $13m expected. Despite the delay of the GC Series, the company claims to be growing at an annual rate of 50% to 70%. Daniel Barrero Stadler, from Parsytec’s Aachen headquarters, says that of the company’s 700 installations of Transputer-based systems to date, only around 20 feature more than 100 processors, Shell Oil being the largest with 400 T800 Transputers. Parsytec’s most successful market is in industrial control systems and a good 50% of the company’s business is in its home country of Germany. While Parsytec is still determined to be the first company to market with a T9000 product, it is using its waiting time to focus on its Transputer-based image processing system, comprising a cabinet of integrated boards, frame grabbers, display and processing cards.
Cray takes DEC’s Alpha for basis of new Triton MIMD machine, due 1993
Cray Research Inc’s presence at the show was big and glitzy, the vector supercomputer company wanting to emphasise that it is committed to massive parallelism. This pledge was backed up by the announcement that Cray will take marketing partner Digital Equipment Corp’s Alpha 64-bit RISC microprocessor for use in its first-generation offering (CI Nos 1,692, 1,860). Cray has ordered a batch of the new processors – terms not disclosed which will be used to build a multiple instruction-multiple data supercomputer scheduled to ship next year, said Cray chairman John Rollwagen. This first attempt at an massively parallel system, code-named Triton, will aim at achieving 100 GFLOPS by 1993, up to a peak TFLOPS performance by 1995 and sustainable TFLOPS by 1997. Steve Nelson, Cray’s vice president of technology, says the US Defense Advanced Research Projects Agency has recently agreed to provide $12.7m in funding support for the first three years of Cray’s massive parallelism programme. Cray says its cosy relationship with DEC has meant that it has been in a position to influence design of the chip, which is said to be more like the original Cray-1 than the VAX. – Sue Norris
