Under its plans to put all its eggs into the Precision Architecture basket (CI No 2,654), Convex Computer Corp will exploit supposed vector-processing techniques in Hewlett-Packard’s 64-bit PA-8000 RISC, and suggests a 1996 SPP2000 system will be the embodiment of what would otherwise have been a C5 machine. Convex, which has an application binary interface layer running atop its OSF/1 Mach implementation that can run standard HP-UX applications and middleware, is working with Hewlett-Packard on a new version (and a name) tailored for the 64-bit PA-8000. The new SPP1200 models preserve Convex’s Global Shared Memory parallel programming model which presents a single shared view of system memory, but includes a new input-output channel to take advantage of Hewlett-Packard’s runway bus, basically an uprated version of the existing Convex Toroidal Interconnect. Convex claims the channel will deliver four times the input-output throughput and twice the input-output scalability of the existing SPP1000 system, which runs at 4Gbps and has been designed in conjunction with its partner, Japanese steelmaker NKK Corp. Convex, which lost $7.5m in the first quarter on sales up 24%, shipped eight C4 systems worth a total of $8m in total in its fourth quarter, and described the performance as a strong set of figures. At the time it had 1,340 C systems installed at 660 customer sites. It shipped a total of 62 Exemplars in 1994 – 23 to non-C series customers – 27 of them in the final quarter. Its largest installation to date is configured with 64 CPUs. The SPP1000/CD compact version of Exemplar has an average selling price of $350,000, and the full-blown SPP1000/XA has averaged $700,000 per installation. Hewlett-Packard includes the SPP in its price list and holds 5% of Convex.
