Ross Technology Inc claims that it is the missing ingredient on the Fujitsu Ltd side of the Sparc road map that Sun Microsystems Inc and Fujitsu outlined three weeks ago, while keeping it intentionally vague. Ross, which Fujitsu acquired from Cypress Semiconductor Corp some months ago, says it is Fujitsu’s predominant CPU development arm, and thus more important to any Sparc contributions that Fujitsu makes than Fujitsu Microelectronics, which it described as working on some low-end splinter projects, or HaL Computers International, which has a proprietary Sparc CPU chip set that will never hit the merchant market. Sun’s Sparc Technology Business unit, the company’s Sparc development arm and essentially a Ross competitor, suggests that Ross is inflating its own importance and that Fujitsu’s plans are too vapourish to support its subsidiary’s claims. This week, Ross will start sampling HyperSparc chips at 80MHz, 90MHz and 100MHz. They are slated for full production next quarter. A 110MHz HyperSparc will also start sampling in July, for volume production in the fourth quarter. Ross chairman and chief executive Roger Ross claims he now expects HyperSparc systems to be announced by virtually every major Sparc house. This is expected to include Sun Microsystems itself, an account that has remained resistant to HyperSparc’s allures since its days under Cypress’s administration when Ross experienced what it now calls catastrophic fab failure – it got only one working part out of the first 500 66MHz HyperSparcs made. Using Fujitsu manufacturing processes, such problems, which are said to have cost it six months, are understood to be resolved. Sparc Technology is quick to throw cold water on Ross’s claims that it will successfully woo Sun Microsystems Computer Corp or that the high-end HyperSparc will appear in a new iteration of the Sparcstation 20.
Less space
Sparc Technology reckons it will get that business itself. But Ross says it is debugging its chips hand-in-hand with Sun Microsystems Computer Corp and optimising HyperSparc for Solaris 2.4. The rest of Ross’s game plan for V8 Sparc Architecture chips includes shrinking its new chips using Fujitsu’s CS55 process and boosting frequency further. It also intends to enhance the micro architecture and boost performance again. Next year, it will expand into the V9 Sparc architecture and attempt a cost-effective UltraSparc, enhanced V9 floating point and enhanced Wabi performance on its chips. Meanwhile, Ross is sampling 80MHz HyperSparcs for $2,511, in single units with 256Kb second-level cache and a 40MHz MBus operation. The 90MHz goes for $3,187 and the 100MHz for $4,019. They run Solaris 2.3 and are also available with a 50MHz MBus interface. Typically, they operate at 3.5 Watts power dissipation. Their multi-die packaging is said to mean that they take up less space on the motherboard.
