From its base in Camas, Washington, Sharp Corp announces that it has developed just what designers of portable devices have been waiting for – a dynamic random access memory chip in which part of the memory can be rendered read-only at the time of final masking, enabling RAM and ROM to be combined on a single chip. Called the New RAM LH6P81T, it enables customers to program fixed data into ROM of arbitrary size within the RAM area when they order the chips from Sharp. It enables RAM and ROM to be accessed at the same speed to simplify address management and software development; eliminates unused surplus memory space generated on the ROM side, enabling use of the full 8M-bit capacity, and of course saves precious board space. Fixed data can be programmed into ROM in 256-byte units in a region of arbitrary size within the total 8M-bit memory space. Currently available in a 3.3V version with maximum power dissipation of 40mA, it will be offered in a 5V version with higher densities later. Access times remain constant, regardless of whether the LH6P81T is operated in page mode – 40nS access time, or in normal mode, 80nS access time. The page mode function enables data to be read in pages 256 bytes long. The LH6P81T is also designed with structures common to pseudo-Static RAM memory devices such as non-multiplexed addressing and a self-refresh function – no external refresh required, providing high performance for RAM applications. It is arranged as 512K by 16 bits and will sample next month at $40 a time for orders of 100.
